This invention relates generally to the field of electronic devices, and more particularly to an improvement in MOS-type semiconductor devices and a method for making the same.
A Metal-Oxide-Semiconductor Field-Effect-Transistor (xe2x80x9cMOSFETxe2x80x9d) is a four-terminal electronic semiconductor device and consists of: (1) a p- (or n) type semiconductor substrate into which two n+ (or p+) regions, the source and the drain, are formed; and (2) a metal contact called a gate formed on top of a gate oxide. In integrated circuits (xe2x80x9cICsxe2x80x9d), MOSFETS serve as switches. That is, they may switch current within the IC from the source into the drain xe2x80x9conxe2x80x9d or xe2x80x9coffxe2x80x9d according to the potential difference between the gate and the substrate. The function played by the gate oxide is that of a dielectric layer in order to induce an inversion layer or a channel between the source and the drain, and an insulating layer that insulates the gate from the semiconductor.
It has been deemed desirable within ICs to scale-down, or miniaturize, the physical size of the IC. This may require, inter alia, scaling down of MOSFETS and other IC components, including scaling-down of the thickness of vertical layers out of which such components are formed. But in the case of gate oxide of a MOSFET, when the thickness of a gate oxide layer is reduced beyond a certain level (for instance, below the level of 2 or 3 nanometer (nm)), it has been found that certain difficulties may ensue. Specifically, the quantum electronic event known as electron tunneling (or leakage) may cause a current to pass through such very thin gate oxide layers at undesired times, thus possibly causing three serious problems: (1) an increase of the power consumption of the IC because of current flows in MOSFET even when the MOSFET is intended to be in its xe2x80x9coffxe2x80x9d state; (2) a decrease in the IC""s operating speed because of unintended current flow; and (3) accelerated buildup of gate oxide defects as a result of higher-than-intended current density through the gate, resulting in premature dielectric breakdown of the oxide and thus of the IC.
Most of the previous attempts at solving the problem of tunneling-induced leakage through the gate oxide of a MOSFET concentrated upon increasing the dielectric constant of the gate insulating layer, i.e., obtaining the same desired charge storage capability with the use of a thicker dielectric film of increased dielectric constant, and hence reducing the tunneling current flowing through the gate.
In such prior art attempts to reduce tunneling current, three general methods for increasing the dielectric constant may be mentioned. First, incorporation of nitrogen into the SiO2 film forming the gate oxide. Secondly, nitridation of the SiO2 film. Thirdly, replacing the SiO2 film with a completely different gate oxide material having a higher dielectric constant than that of SiO2. Materials having such higher dielectric constants may include Si3N4, TiO2, Ta2O5, and Al2O3.
In a crystal, the atoms that construct the crystal are positioned in such fashion that the atoms have periodicity along certain dimensional orientations. One can consider three basic vectors a1, a2, and a3 as representing the three dimensions or axes within a crystal, and hence may use such vectors in describing the periodic regulation of atom positioning. These basic vectors may be referred to as primitive translation vectors. When one wishes to specify a particular orientation in a crystal, he can use the three primitive translation vectors and represent the particular orientation using a designation such as [xyz], (wherein x, y, and z are all integers), in which case the orientation is parallel to the vector xa1+ya2+za3. Next, let us consider an origin point at a certain atom within a crystal. It is possible to consider a plane that crosses three atoms whose positions are represented by three vectors, pa1, qa2, and ra3, respectively, from the origin point. In this case, we represent the plane in question by using the designation, (xyz), (wherein x, y and z are all integers). Here, the integers, x, y, and z, are chosen to make the absolute values of the integers as small as possible, and to make the ratio between x, y, and z to be the same as the ratio between 1/p, 1/q, and 1/r. We may use the designation, (xyz), for all the planes parallel to the plane thus considered.
Each of the above-described prior art approaches to reducing leakage current by increasing dielectric constant of the gate oxide may have some utility for reduction of tunneling and leakage current. However, in all of the above-described prior art methods for reducing leakage current, the crystalline orientation of the gate electrode has generally not been taken into account as another possible parameter whose variation could be employed for further reducing the leakage current.
Accordingly, a need has arisen in the art for an improved MOS-type semiconductor device, in which the MOSFET has a gate oxide providing further-reduced current leakage/tunneling by virtue of judicious utilization of the crystallographic orientation (and/or other physical parameters that influence semiconducting properties) of the gate oxide layer. The present invention provides such a MOSFET and a method for making it that may substantially improve the leakage current properties of the MOSFET and hence the performance of an IC.
In accordance with the present invention, a MOSFET comprises a first semiconductor adjacent an insulating film, in turn adjacent a second semiconductor, wherein the first semiconductor and the second semiconductor are monocrystalline semiconductors and wherein the crystalline axes of the first and second semiconductors are arranged in different directions to each other. More specifically, the MOSFET of the present invention may be formed by selecting a first semiconductor whose [100] crystallographic direction is orthogonal with respect to the surface of the insulating film, and a second semiconductor whose [111] crystallographic direction is orthogonal with respect to the surface of the insulating film.
The technical advantages of the present invention include the provision of enhanced leakage current reduction within a MOSFET by appropriate selection not only of a gate insulator having high dielectric constant, but also of appropriate semiconductors on either side of the gate insulator layer so that tunneling current is also dependent upon (and reduced by) the crystallographic orientation of the gate electrode and the substrates.
Another technical advantage of the present invention is that it provides a number of possible particular combinations of constituent semiconductors for a MOSFET, wherein the semiconductors are chosen for advantageous crystallographic orientations (and/or other physical parameters that influence semiconducting properties) and leakage reduction. A further advantage of the present invention is that it provides fabrication methods for formation of MOSFETS wherein each of the semiconductors is assembled in proper crystallographic orientation with respect to the insulating oxide layer.
Other technical advantages of the present invention will be readily apparent to those skilled in the art from the following drawings, descriptions, and claims.